Copyright(C) 1994,1995,1996,1997 Terumasa KODAKA , Takeshi KONO


■NMI mask control
Target            Normal, high resolution
Explanation:      Although it is not possible to mask NMI using the CPU function, the PC-9800 allows NMI to be masked using an external circuit.
                o PC-9800 generates NMI (Non Maskable Interrupt) when a parity error occurs in main memory. The type of memory that caused the
                  parity error can be determined by I/O 0033h. It is possible to identify the memory inside the main unit and the memory added
                  to the expansion slot.
                o The expansion memory board for the expansion bus (C bus, PC-H98 E bus) activates the IOCHK0 (NMI input) signal line when a
                  parity error occurs in the memory.
                u Some models do not have parity in their internal memory. In such models, parity error notifications due to internal memory will not occur.
                u When Windows 3.1 is running, the Windows kernel does nothing even if an NMI occurs. Parity error notification is not performed.
                o PC-9801U, PC-98LT・HA, and DB-P1 do not have a parity error detection function.
                o In some models, NMI may occur for reasons other than memory parity errors. For details, refer to the "INT 02h (CPU exception)"
                  section of "UNDOCUMENTED 9801/9821 Vol.1".
                o The I/O addresses related to NMI mask control are as follows.
                  ------------+-------+-----+----------------------------------------------
                  I/O address | Width | R/W | Content
                  ------------+-------+-----+----------------------------------------------
                  0050h       | BYTE  |  W  | NMI flip-flop reset
                  0052h       | BYTE  |  W  | NMI flip-flop set
                  98F0h       | BYTE  |  R  | Get NMI occurrence factor
                  ------------+-------+-----+----------------------------------------------


I/O               0050h, 0052h
Name              NMI flip-flop set/reset
Target            Normal (excluding PC-9801U), high resolution
Function
                  ------------+-------+-----+----------------------------------------------
                  I/O address | Width | R/W | Content
                  ------------+-------+-----+----------------------------------------------
                  0050h       | BYTE  |  W  | NMI flip-flop reset (NMI prohibited)
                  0052h       | BYTE  |  W  | NMI flip-flop set (NMI allowed)
                  ------------+-------+-----+----------------------------------------------
                  * Output value to each port is arbitrary
Description     o Enable/disable NMI notification.
                o Memory parity errors can also be masked with I/O 0035h bit 4, but its role is different from that of this port.
                  When a parity error occurs, setting I/O 0035h bit 4 to 0 clears the parity error notification flag (I/O 0033h bit 2,1).
                  However, if NMI is disabled on the NMI F/F controlled by this port, the parity error flag will not be cleared.
                u However, the procedure for clearing the flag on PC-H98 is different from other models. See I/O 98F0h section.
                  Also, when the NMI F/F is in the reset state, IOCHK0 is not latched even if it falls. In other models, the falling edge
                  of IOCHK0 is latched even if the NMI F/F is in the reset state.
                u On the PC-9801NV・NS/E・NC・NL・NS/L・NA (a model that supports resume and does not have an SMM in the CPU), when resume is
                  turned on, an NMI occurs for reasons other than memory parity errors, but this port Only NMIs caused by memory parity
                  errors can be masked. NMIs caused by other factors are not masked.
                o On PC-H98, NMI occurs for reasons other than memory parity errors, but all NMI can be masked with this port.

Related           I/O 0033h bit 2,1
                  I/O 0035h bit 4
                  I/O 00F6h bit 1
                  I/O 98F0h
                  INT 02h


I/O               98F0h
Name              Get NMI occurrence factor
Undocumented
Target            PC-H98
Function
                  [READ]
                  bit 7~5: unknown
                  bit 4: Internal memory parity error
                         1=Yes
                         0=none
                  bit 3: unknown
                  bit 2: Parity error of memory added to expansion slot
                         1=Yes
                         0=none
                  bit 1~0: unknown

                  [WRITE] None

Explanation     o I/O for acquiring various NMI factors expanded with PC-H98. The meaning of bits other than bits 4 and 2 is unknown.
                o Flags with the same meaning as I/O 98F0h bits 4,2 can also be read from I/O 0033h bits 2,1.
                o If I/O 98F0h or I/O 0033h is read even once, I/O 98F0h bits 4,2 and I/O 0033h bit 2,1 flag is cleared.
                  I/O 0035h bit 4 is inactive on PC-H98, so setting I/O 0035h bit 4 to 0 like on other models does not clear the flag.

Related           I/O 0033h bit 2,1
                  I/O 0050h
                  I/O 0052h
                  INT 02h


I/O               0450h
Name              Unknown
Undocumented
Target            PC-H98
Function
                  [READ/WRITE]
                  bit 7~0: unknown

Explanation     o Details unknown